Coding Theory For Hardware Reliability

Coding Theory for Hardware Reliability is a theoretical framework within coding theory that specifically designs error-detecting and error-correcting codes to ensure the functional correctness and fault tolerance of digital circuits and hardware systems under operational and environmental disturbances.

9

Publications

816

Citations

20

Authors

24

Institutions

Publications per year

2017–2026

0

Authors

20

  1. JS
    James S. Plank

    University of Tennessee at Knoxville, United States

    2 publications · 680 citations

    2

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  2. ED
    Elsa Dupraz

    Centre National de la Recherche Scientifique, France

    2 publications · 32 citations

    2

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  3. VS
    Valentin Savin

    Commissariat à l'Énergie Atomique et aux Énergies Alternatives, France

    2 publications · 32 citations

    2

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  4. BV
    Bane Vasić

    University of Arizona, United States

    2 publications · 32 citations

    2

    h-index

  5. DD
    David Declercq

    CY Cergy Paris Université, France

    2 publications · 32 citations

    2

    h-index

1–5 of 20

Venues

  1. Software Practice and Experience

    2 publications · 680 citations

    2

    h-index

  2. IEEE Transactions on Computers

    1 publications · 16 citations

    1

    h-index

  3. IEEE Transactions on Information Theory

    1 publications · 27 citations

    1

    h-index

  4. IEEE Communications Letters

    1 publications · 13 citations

    1

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  5. 1

    h-index

1–5