Closed-loop Validation

Closed-Loop Validation is a systematic testing methodology within Hardware-In-The-Loop Testing that verifies system behavior by continuously feeding real-time outputs from the physical component back into the simulated environment to assess dynamic interaction and control accuracy under operational conditions.

31

Publications

932

Citations

128

Authors

46

Institutions

Publications per year

2017–2026

6

Authors

128

  1. EN
    Efstratios N. Pistikopoulos

    Imperial College London, United Kingdom

    2 publications · 46 citations

    2

    h-index

  2. BH
    Biao Huang

    University of Alberta, Canada

    2 publications · 42 citations

    2

    h-index

  3. JA
    Jace Allen

    Medpace (United States), United States

    2 publications · 79 citations

    2

    h-index

  4. ZJ
    Zhihao Jiang

    University of Pennsylvania, United States

    1 publications · 76 citations

    1

    h-index

  5. VV
    Valeriy Vyatkin

    Luleå University of Technology, Sweden

    1 publications · 95 citations

    1

    h-index

1–5 of 128

Venues

  1. 4

    h-index

  2. Journal of Process Control

    2 publications · 42 citations

    2

    h-index

  3. IFAC-PapersOnLine

    2 publications · 25 citations

    2

    h-index

  4. Applied Intelligence

    1 publications · 32 citations

    1

    h-index

  5. AIAA SPACE 2016

    1 publications · 10 citations

    1

    h-index

1–5