Clock Tree Routing
Clock Tree Routing is a specialized integrated circuit routing methodology that belongs to the broader class of physical design automation techniques, distinguished by its focus on constructing a dedicated network to distribute the clock signal with minimized skew and insertion delay across synchronous digital circuits.
46
Publications
2.1K
Citations
90
Authors
33
Institutions
Publications per year
2017–2026
3
Parents
46
1–5 of 46
90
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University of Illinois Urbana-Champaign, United States
3 publications · 162 citations
3
h-index
1–5 of 90
33
The University of Texas at Austin
Austin, United States
6 h-index
17 publications
802 citations
University of California, Los Angeles
Los Angeles, United States
5 h-index
11 publications
1.3K citations
University of Southern California
Los Angeles, United States
5 h-index
8 publications
216 citations
Texas A&M University
College Station, United States
5 h-index
9 publications
494 citations
Purdue University West Lafayette
West Lafayette, United States
4 h-index
6 publications
107 citations
University of California, Santa Cruz
Santa Cruz, United States
3 h-index
5 publications
122 citations
Engineering Systems (United States)
Omaha, United States
3 h-index
4 publications
151 citations
University of Michigan
Ann Arbor, United States
3 h-index
6 publications
104 citations
1–8 of 33
6 publications · 437 citations
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2 publications · 31 citations
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Conference · 1 publications · 52 citations
1
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Conference · 1 publications · 17 citations
1
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1 publications · 32 citations
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