Clock Power Optimization

Clock Power Optimization is a power management methodology that specifically targets the reduction of dynamic and static power consumption in digital systems by adjusting clock frequency, gating clock signals, or manipulating clock distribution networks to minimize energy usage without compromising timing constraints.

Publications

3.7K

Citations

288

Authors

Institutions

Publications per year

2017–2026

Parents

Clock Management

Publications

A reduced clock-swing flip-flop (RCSFF) for 63% power reduction

Hiroshi Kawaguchi, T. Sakurai · IEEE Journal of Solid-State Circuits · 1998 · 266 citations

Engineering, Computer Engineering, Electrical Engineering +17

Saving power by synthesizing gated clocks for sequential circuits

Luca Benini, Paul H. Siegel, Giovanni De Micheli · IEEE Design & Test of Computers · 1994 · 170 citations

Engineering, Computer Engineering, Electrical Engineering +17

Lowering power consumption in clock by using globally asynchronous locally synchronous design style

Ahmed Hemani, T. Meincke, S. Kumar et al. · 1999 · 150 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +16

Power-aware placement

Yongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng et al. · 2005 · 120 citations

Engineering, Computer Engineering, Computer Science +17

Clock-tree power optimization based on RTL clock-gating

Monica Donno, Alessandro Ivaldi, Luca Benini et al. · 2003 · 105 citations

Engineering, Computer Engineering, Computer Science +17

1–5 of 98

Authors

288

SK
Sung Kyu Lim
Georgia Institute of Technology, United States
7 publications · 314 citations
7
h-index
XZ
Xin Zhao
Georgia Institute of Technology, United States
6 publications · 250 citations
6
h-index
LB
Luca Benini
University of Bologna, Italy
4 publications · 318 citations
4
h-index
BP
Bishwajeet Pandey
Chitkara University, India
4 publications · 70 citations
4
h-index
DZ
David Z. Pan
The University of Texas at Austin, United States
3 publications · 35 citations
3
h-index

1–5 of 288

Institutions

1–8 of 97

Venues

IEEE Journal of Solid-State Circuits
6 publications · 568 citations
6
h-index
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
6 publications · 326 citations
6
h-index
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
4 publications · 169 citations
4
h-index
IEEE Transactions on Circuits & Systems II Express Briefs
2 publications · 43 citations
2
h-index
IEEE Transactions on Circuits and Systems I Regular Papers
2 publications · 45 citations
2
h-index

1–5