Concepedia

Clock Gating Constraints

Clock Gating Constraints is a timing and structural design constraint in synchronous digital circuits that specifies the conditions under which clock signals may be selectively disabled to reduce power consumption, differentiating it from general power optimization techniques by enforcing correctness in clock gating implementations through formal timing and logical dependencies.

10

Publications

401

Citations

24

Authors

10

Institutions

Publications per year

2017–2026

0

Parents

Publications

10

Unified methodology for resolving power-performance tradeoffs at the microarchitectural and circuit levels

Victor Zyuban, Philip N. Strenski · 2002 · 112 citations

, , +17

Clock-tree power optimization based on RTL clock-gating

Monica Donno, Alessandro Ivaldi, Luca Benini et al. · 2003 · 105 citations

, , +17

Unified methodology for resolving power-performance tradeoffs at the microarchitectural and circuit levels

Victor Zyuban, Philip N. Strenski · Proceedings of the International Symposium on Low Power Electronics and Design · 2002 · 53 citations

, , +17

Resurrecting infeasible clock-gating functions

Eli Arbel, Cindy Eisner, Oleg Rokhlenko · 2009 · 34 citations

, , +17

Clock-tree power optimization based on RTL clock-gating

Monica Donno, Alessandro Ivaldi, Luca Benini et al. · Proceedings of the 40th conference on Design automation - DAC '03 · 2003 · 26 citations

, , +17

1–5 of 10

Authors

24

  1. LB
    Luca Benini

    University of Bologna, Italy

    3 publications · 148 citations

    3

    h-index

  2. PN
    Philip N. Strenski

    IBM Research - Thomas J. Watson Research Center, United States

    3 publications · 175 citations

    3

    h-index

  3. VZ
    Victor Zyuban

    IBM Research - Thomas J. Watson Research Center, United States

    3 publications · 175 citations

    3

    h-index

  4. EM
    Enrico Macii

    Politecnico di Torino, Italy

    2 publications · 131 citations

    2

    h-index

  5. MD
    Monica Donno

    Politecnico di Torino, Italy

    2 publications · 131 citations

    2

    h-index

1–5 of 24

Institutions

10

  1. University of Bologna

    Bologna, Italy

    3 h-index

    3 publications

    148 citations

  2. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    3 h-index

    6 publications

    350 citations

  3. Politecnico di Torino

    Turin, Italy

    3 h-index

    6 publications

    296 citations

  4. IBM Research - Haifa

    Haifa, Israel

    1 h-index

    3 publications

    102 citations

  5. University of Michigan

    Ann Arbor, United States

    1 h-index

    3 publications

    45 citations

  6. Sony (Taiwan)

    Taipei, Taiwan

    1 h-index

    4 publications

    68 citations

  7. Sony Computer Science Laboratories

    Tokyo, Japan

    1 h-index

    1 publications

    17 citations

  8. Intel (United States)

    Santa Clara, United States

    1 h-index

    1 publications

    15 citations

1–8 of 10

Venues

  1. 1

    h-index

  2. Proceedings of the 40th conference on Design automation - DAC '03

    Conference · 1 publications · 26 citations

    1

    h-index

  3. IEEE Journal of Solid-State Circuits

    1 publications · 17 citations

    1

    h-index

  4. 1

    h-index

1–4