Carry-save Logic

Carry-Save Logic is a combinational logic technique used in arithmetic circuit design that belongs to the class of high-speed addition methods, distinguished by its ability to perform parallel addition of three or more binary numbers by separately computing sum and carry bits without immediate carry propagation, thereby reducing critical path delay in multi-operand addition.

261

Publications

9.5K

Citations

558

Authors

227

Institutions

Publications per year

2017–2026

24

Authors

558

  1. ME
    M.D. Ercegovac

    University of California, Los Angeles, United States

    9 publications · 331 citations

    9

    h-index

  2. TL
    T. Lang

    University of California, Irvine, United States

    6 publications · 245 citations

    6

    h-index

  3. PM
    Paolo Montuschi

    Politecnico di Torino, Italy

    5 publications · 203 citations

    5

    h-index

  4. SP
    S.J. Piestrak

    Wrocław University of Science and Technology, Poland

    4 publications · 318 citations

    4

    h-index

  5. OG
    Oscar Gustafsson

    Linköping University, Sweden

    4 publications · 76 citations

    4

    h-index

1–5 of 558

Venues

  1. IEEE Transactions on Computers

    35 publications · 2.3K citations

    28

    h-index

  2. 11

    h-index

  3. IEEE Journal of Solid-State Circuits

    10 publications · 479 citations

    10

    h-index

  4. 6

    h-index

  5. Electronics Letters

    6 publications · 299 citations

    6

    h-index

1–5