Cache Line Migration

Cache Line Migration is the phenomenon in which a cache line is transferred between processing units in a multiprocessor system to maintain coherence and improve data locality, distinguished from other coherence-related transfers by its focus on the movement of data due to access patterns rather than invalidation or update.

6

Publications

108

Citations

22

Authors

13

Institutions

Publications per year

2017–2026

2

Authors

22

  1. SD
    Srinivas Devadas

    Massachusetts Institute of Technology, United States

    1 publications · 11 citations

    1

    h-index

  2. ZC
    Zeshan Chishti

    Intel (United States), United States

    1 publications · 13 citations

    1

    h-index

  3. NK
    Nectarios Koziris

    National Technical University of Athens, Greece

    1 publications · 13 citations

    1

    h-index

  4. CG
    Christina Giannoula

    National Technical University of Athens, Greece

    1 publications · 13 citations

    1

    h-index

  5. EA
    Eduard Ayguadé

    Universitat Politècnica de Catalunya, Spain

    1 publications · 13 citations

    1

    h-index

1–5 of 22

Venues

  1. Journal of Parallel and Distributed Computing

    1 publications · 19 citations

    1

    h-index

  2. Mobile Information Systems

    1 publications · 14 citations

    1

    h-index

  3. 1

    h-index

1–3