Bypass Logic is a safety interlock mechanism within Reactor Protection Systems that conditionally permits the temporary override of protective functions under predefined operational constraints, distinguishing it from permanent disablement or failure-based override by enforcing controlled, time-limited, and authorization-dependent exceptions to ensure continued system safety.
16
Publications
1.5K
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41
Authors
20
Institutions
Publications per year
2017–2026
2
Publications
16
Complexity-effective superscalar processors
Subbarao Palacharla, Norman P. Jouppi, James E. Smith · 1997 · 839 citations
1–5 of 16
Authors
41
- JE
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- NP
3
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- SP
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- EE
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1–5 of 41
Institutions
20
University of Wisconsin–Madison
Madison, United States
4 h-index
8 publications
3K citations
Intel (United States)
Santa Clara, United States
3 h-index
3 publications
43 citations
North Carolina State University
Raleigh, United States
2 h-index
4 publications
282 citations
University of California, Irvine
Irvine, United States
2 h-index
5 publications
80 citations
University of Illinois Urbana-Champaign
Urbana, United States
1 h-index
3 publications
42 citations
University of California San Diego
San Diego, United States
1 h-index
2 publications
62 citations
Duke University
Durham, United States
1 h-index
2 publications
22 citations
Changzhou University
Changzhou, China
1 h-index
1 publications
12 citations
1–8 of 20
Venues
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
1 publications · 10 citations
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- ACM SIGARCH Computer Architecture News
1 publications · 133 citations
1
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- Journal of Natural Gas Science and Engineering
1 publications · 12 citations
1
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- International Journal of Heat and Fluid Flow
1 publications · 37 citations
1
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- Design, Automation, and Test in Europe
Conference · 1 publications · 20 citations
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