Bitstream Relocation

Bitstream Relocation is a method in the domain of partial reconfiguration that enables the dynamic adjustment of a partial bitstream’s address space to align with varying physical configuration frames within an FPGA, thereby allowing the same bitstream to be deployed across different reconfigurable regions or instances without modification.

26

Publications

717

Citations

88

Authors

34

Institutions

Publications per year

2017–2026

3

Authors

88

  1. DS
    Donatella Sciuto

    Politecnico di Milano, Italy

    4 publications · 118 citations

    4

    h-index

  2. MD
    Marco D. Santambrogio

    Politecnico di Milano, Italy

    4 publications · 118 citations

    4

    h-index

  3. MN
    M. Novati

    Politecnico di Milano, Italy

    4 publications · 118 citations

    4

    h-index

  4. MM
    M. Morandi

    Politecnico di Milano, Italy

    3 publications · 85 citations

    3

    h-index

  5. SC
    Simone Corbetta

    Politecnico di Milano, Italy

    2 publications · 69 citations

    2

    h-index

1–5 of 88

Venues

  1. 1

    h-index

  2. Microprocessors and Microsystems

    MICPRO · 1 publications · 14 citations

    1

    h-index

  3. IEICE Transactions on Information and Systems

    1 publications · 10 citations

    1

    h-index

  4. IEEE Computer Architecture Letters

    1 publications · 20 citations

    1

    h-index

1–4