Bit-vector Reasoning
Bit-Vector Reasoning is a formal reasoning technique within Satisfiability Modulo Theories that specifically handles constraints over fixed-size bit vectors using domain-specific inference rules and decision procedures to determine satisfiability.
34
Publications
1.1K
Citations
85
Authors
35
Institutions
Publications per year
2017–2026
11
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1–5 of 34
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Microsoft Research (United Kingdom), United Kingdom
3 publications · 111 citations
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2
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1–5 of 85
35
Microsoft (United States)
Redmond, United States
4 h-index
5 publications
176 citations
University of California, Berkeley
Berkeley, United States
3 h-index
5 publications
133 citations
University of Oxford
Oxford, United Kingdom
3 h-index
6 publications
279 citations
Intel (Israel)
Kiryat Gat, Israel
3 h-index
5 publications
107 citations
Microsoft Research (United Kingdom)
Cambridge, United Kingdom
3 h-index
6 publications
222 citations
Duke University
Durham, United States
2 h-index
5 publications
86 citations
Fondazione Bruno Kessler
Trento, Italy
2 h-index
2 publications
100 citations

Johannes Kepler University of Linz
Linz, Austria
2 h-index
5 publications
116 citations
1–8 of 35
4 publications · 152 citations
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Repository · 3 publications · 55 citations
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Conference · 2 publications · 56 citations
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1 publications · 11 citations
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Conference · 1 publications · 17 citations
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