Barrier Latency

Barrier Latency is the time delay incurred by a process or thread when arriving at a synchronization point in a parallel computing system, defined as the interval between a process reaching the barrier and all other participating processes also reaching the barrier, thereby determining the waiting period before collective continuation.

8

Publications

188

Citations

29

Authors

15

Institutions

Publications per year

2017–2026

1

Authors

29

  1. DK
    Dhabaleswar K. Panda

    The Ohio State University, United States

    3 publications · 83 citations

    3

    h-index

  2. DB
    Darius Buntinas

    Argonne National Laboratory, United States

    2 publications · 65 citations

    2

    h-index

  3. VP
    Vassilis Papaefstathiou

    Foundation for Research and Technology Hellas, Greece

    1 publications · 11 citations

    1

    h-index

  4. PS
    P. Sadayappan

    The Ohio State University, United States

    1 publications · 38 citations

    1

    h-index

  5. FS
    Federico Silla

    Universitat Politècnica de València, Spain

    1 publications · 11 citations

    1

    h-index

1–5 of 29

Venues

  1. Microprocessors and Microsystems

    MICPRO · 1 publications · 22 citations

    1

    h-index

  2. IEEE Micro

    1 publications · 11 citations

    1

    h-index

  3. IEEE Transactions on Computers

    1 publications · 12 citations

    1

    h-index

  4. Foundations of Physics

    1 publications · 14 citations

    1

    h-index

1–4