Architecture-level Optimization

Architecture-Level Optimization is a design methodology within computer architecture that specifically targets the minimization of power consumption and enhancement of energy efficiency in computing systems operating near the energy threshold required for correct operation, by reconfiguring architectural components and operational parameters to maintain performance under constrained voltage and frequency conditions.

412

Publications

30.5K

Citations

1.4K

Authors

389

Institutions

Publications per year

2017–2026

89

Authors

1.4K

  1. MK
    Mahmut Kandemir

    Pennsylvania State University, United States

    9 publications · 240 citations

    9

    h-index

  2. CS
    Cristina Silvano

    Politecnico di Milano, Italy

    6 publications · 141 citations

    6

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  3. MP
    Massoud Pedram

    University of Southern California, United States

    6 publications · 193 citations

    6

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  4. VZ
    Victor Zyuban

    IBM Research - Thomas J. Watson Research Center, United States

    6 publications · 268 citations

    6

    h-index

  5. IK
    I. Kadayif

    Pennsylvania State University, United States

    6 publications · 175 citations

    6

    h-index

1–5 of 1.4K

Venues

  1. 13

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  2. 10

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  3. IEEE Transactions on Computers

    8 publications · 230 citations

    8

    h-index

  4. arXiv (Cornell University)

    Repository · 7 publications · 1K citations

    7

    h-index

  5. IEEE Micro

    5 publications · 174 citations

    5

    h-index

1–5