Architecture-level Optimization
Architecture-Level Optimization is a design methodology within computer architecture that specifically targets the minimization of power consumption and enhancement of energy efficiency in computing systems operating near the energy threshold required for correct operation, by reconfiguring architectural components and operational parameters to maintain performance under constrained voltage and frequency conditions.
412
Publications
30.5K
Citations
1.4K
Authors
389
Institutions
Publications per year
2017–2026
89
Parents
412
1–5 of 412
1.4K
9
h-index
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6
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IBM Research - Thomas J. Watson Research Center, United States
6 publications · 268 citations
6
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6
h-index
1–5 of 1.4K
389
University of California, Berkeley
Berkeley, United States
17 h-index
41 publications
3.1K citations
Intel (United States)
Santa Clara, United States
16 h-index
43 publications
3.1K citations
University of Illinois Urbana-Champaign
Urbana, United States
15 h-index
28 publications
2.8K citations
Tsinghua University
Beijing, China
11 h-index
47 publications
1.9K citations

Pennsylvania State University
State College, United States
10 h-index
34 publications
1.1K citations
Princeton University
Princeton, United States
10 h-index
19 publications
3.3K citations
University of California, Los Angeles
Los Angeles, United States
10 h-index
24 publications
627 citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
9 h-index
15 publications
1.8K citations
1–8 of 389
14 publications · 799 citations
13
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10 publications · 464 citations
10
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8 publications · 230 citations
8
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Repository · 7 publications · 1K citations
7
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5 publications · 174 citations
5
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1–5