Adaptive Hardware Acceleration
Adaptive Hardware Acceleration is a reconfigurable system architecture technique that dynamically optimizes computational performance by reconfiguring hardware resources in response to changing workloads or application demands.
51
Publications
3.5K
Citations
175
Authors
75
Institutions
Publications per year
2017–2026
24
51
FFTW: an adaptive software architecture for the FFT
Matteo Frigo, Steven G. Johnson · 2002 · 1.8K citations
Cache-Conscious Wavefront Scheduling
Timothy G. Rogers, Mike O’Connor, Tor M. Aamodt · 2012 · 419 citations
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75
University of California San Diego
San Diego, United States
4 h-index
15 publications
206 citations

University of Edinburgh
Edinburgh, United Kingdom
2 h-index
2 publications
34 citations

University of Bologna
Bologna, Italy
2 h-index
3 publications
60 citations

Rice University
Houston, United States
2 h-index
6 publications
122 citations

National Taiwan University
Taipei, Taiwan
2 h-index
6 publications
210 citations
University of Kaiserslautern
Kaiserslautern, Germany
2 h-index
6 publications
105 citations
National Electronics and Computer Technology Center
Pathum Thani, Thailand
2 h-index
2 publications
40 citations
University of Michigan
Ann Arbor, United States
2 h-index
5 publications
147 citations
1–8 of 75
2 publications · 27 citations
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Conference · 2 publications · 39 citations
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2 publications · 120 citations
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1 publications · 75 citations
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Repository · 1 publications · 12 citations
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