Adaptive Hardware Acceleration

Adaptive Hardware Acceleration is a reconfigurable system architecture technique that dynamically optimizes computational performance by reconfiguring hardware resources in response to changing workloads or application demands.

51

Publications

3.5K

Citations

175

Authors

75

Institutions

Publications per year

2017–2026

24

Authors

175

  1. TR
    Tajana Rosing

    University of California San Diego, United States

    3 publications · 42 citations

    3

    h-index

  2. MI
    Mohsen Imani

    University of California San Diego, United States

    3 publications · 42 citations

    3

    h-index

  3. PW
    Pushen Wang

    University of California San Diego, United States

    3 publications · 42 citations

    3

    h-index

  4. LB
    Luca Benini

    University of Bologna, Italy

    2 publications · 35 citations

    2

    h-index

  5. BD
    Bita Darvish Rouhani

    University of California San Diego, United States

    2 publications · 36 citations

    2

    h-index

1–5 of 175

Venues

  1. IEEE Transactions on Consumer Electronics

    2 publications · 27 citations

    2

    h-index

  2. Design, Automation, and Test in Europe

    Conference · 2 publications · 39 citations

    2

    h-index

  3. 2

    h-index

  4. Applied Optics

    1 publications · 75 citations

    1

    h-index

  5. arXiv (Cornell University)

    Repository · 1 publications · 12 citations

    1

    h-index

1–5