Statistics
Publications
1
Citations
33
H-Index
1
Active since
2017
Affiliations
Bhavana P. Shrivatava is an author at Maulana Azad National Institute of Technology specializing in low-power adders, arithmetic logic unit design, and timing analysis.
Publications per year
2017–2017
1
1
Low power high speed 1-bit full adder circuit design at 45nm CMOS technology
Ashish Kumar Yadav, Bhavana P. Shrivatava, Ajay Kumar Dadoriya · 2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE) · 2017 · 33 citations
Engineering, Computer Engineering, Electrical Engineering +17
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