A. Krstić - Concepedia

Concepedia

Author

A. Krstić

University of California, Santa Barbara

Also Known As

A. Krstic, A. Krstić, Andrei Braz Krstic

33

Publications

1.3K

Citations

21

H-Index

56

Concepts

All Affiliations

University of California, Santa Barbara Synopsys (United States)Princeton University National Tsing Hua University Intel (United States)

AK

About

A. Krstić is an author at University of California, Santa Barbara specializing in computer engineering, engineering, and software testing.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	21	30	1.3K
2	Education	1	1	82
3	Management	1	1	37
4	Applied Physics	1	1	82
5	Cognitive Science	1	1	15

A. Krstić

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30

Publications

1.3K

Citations

21

H-Index

	Year	Citations
Embedded software-based self-test for programmable core-based designs A. Krstić, Wei-Cheng Lai, Kwang‐Ting Cheng, IEEE Design & Test of Computers EngineeringComputer ArchitectureSoftware EngineeringOn-chip Test GenerationEmbedded Systems	2002	109
Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects A. Krstić, Yimin Jiang, Kwang‐Ting Cheng IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringVlsi DesignPower Optimization (Eda)Noise EffectsComputer Architecture	2001	99
False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation Jing-Jia Liou, A. Krstić, L.-C. Wang, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) EngineeringReal-time System DesignVerificationComputer ArchitectureNetwork Analysis	2002	90
Delay testing considering crosstalk-induced effects A. Krstić, Jing-Jia Liou, Yimin Jiang, EngineeringVlsi DesignComputer ArchitectureCrosstalk-induced EffectsElectromagnetic Compatibility	2002	87
New challenges in delay testing of nanometer, multigigahertz designs Terrence Mak, A. Krstić, Kwang‐Ting Cheng, IEEE Design & Test of Computers EngineeringMeasurementComputer ArchitectureEducationElectromagnetic Compatibility	2004	82
Modeling, testing, and analysis for delay defects and noise effects in deep submicron devices Jing-Jia Liou, A. Krstić, Yiming Jiang, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringVlsi DesignNoise EffectsComputer ArchitectureDelay Defects	2003	71
Test program synthesis for path delay faults in microprocessor cores Wei-Cheng Lai, A. Krstić, Kwang‐Ting Cheng EngineeringMem TestingMicroprocessor CoreComputer ArchitectureSoftware Engineering	2002	64
On testing the path delay faults of a microprocessor using its instruction set Wei-Cheng Lai, A. Krstić, Kwang‐Ting Cheng EngineeringMem TestingVerificationComputer ArchitecturePath Delay	2002	62
Using logic models to predict the detection behavior of statistical timing defects Li-C. Wang, A. Krstić, L. Lee, EngineeringVerificationDiagnosisComputer ArchitectureSoftware Engineering	2004	51
Generation of high quality tests for robustly untestable path delay faults Kwang‐Ting Cheng, A. Krstić, Hsi-Chuan Chen IEEE Transactions on Computers High Quality DelayEngineeringVerificationRobustness TestingTest Data Generation	1996	51

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