Sean Safarpour

Automated Design Debugging With Maximum Satisfiability

Yibin Chen, Sean Safarpour, João Marques‐Silva et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2010 · 82 citations

Engineering, Design Debugging, Debugging Problem +20

Efficient SAT-based Boolean matching for FPGA technology mapping

Sean Safarpour, Andreas Veneris, Gregg Baeckler et al. · 2006 · 48 citations

Engineering, Hardware Verification Language, Verification +16

A performance-driven QBF-based iterative logic array representation with applications to verification, debug and test

Hratch Mangassarian, Andreas Veneris, Sean Safarpour et al. · International Conference on Computer Aided Design · 2007 · 45 citations

Hardware Modeling, Engineering, Hardware Verification Language +19

Improved Design Debugging Using Maximum Satisfiability

Sean Safarpour, Hratch Mangassarian, Andreas Veneris et al. · 2007 · 29 citations

Engineering, Hardware Verification Language, Verification +20

Bounded Model Debugging

Brian Keng, Sean Safarpour, Andreas Veneris · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2010 · 27 citations

Engineering, Design Debugging, Electronic Design Automation +22