R. Rathi

A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips

R. Farjad-Rad, William J. Dally, Hiok-Tiaq Ng et al. · IEEE Journal of Solid-State Circuits · 2002 · 211 citations

Engineering, Computer Engineering, Electrical Engineering +17

A second-order semidigital clock recovery circuit based on injection locking

Hiok-Tiaq Ng, R. Farjad-Rad, M.-J.E. Lee et al. · IEEE Journal of Solid-State Circuits · 2003 · 64 citations

Engineering, Electrical Engineering, Analog Electronics +12

0.622-8.0 Gbps 150 mW serial IO macrocell with fully flexible preemphasis and equalization

R. Farjad-Rad, Hiok-Taiq Ng, M.-J. Edward Lee et al. · 2004 · 45 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 33-mW 8-Gb/s CMOS clock multiplier and CDR for highly integrated I/Os

R. Farjad-Rad, An Nguyen, James Tran et al. · IEEE Journal of Solid-State Circuits · 2004 · 40 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 0.2-2 GHz 12 mW multiplying DLL for low-jitter clock synthesis in highly-integrated data communication chips

R. Farjad-Rad, William J. Dally, Hoik-Tiaq Ng et al. · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2003 · 36 citations

Engineering, Computer Engineering, Electrical Engineering +15