Concepedia

S. Yamamoto

SY

Statistics

Publications

3

Citations

95

H-Index

3

Active since

1982

Affiliations

Tokyo Institute of Technology(Current)

S. Yamamoto is an author at Tokyo Institute of Technology specializing in computer architecture, computer engineering, and electrical engineering.

Top concepts

EngineeringVlsi DesignMicroelectronicsComputer EngineeringComputer ArchitectureElectrical EngineeringHardware SecurityLow-power ElectronicsSpintronicsCmos Technology

Publications per year

1982–2011

3

Publications

3

Nonvolatile delay flip-flop using spin-transistor architecture with spin transfer torque MTJs for power-gating systems

S. Yamamoto, Yusuke Shuto, Satoshi Sugahara · Electronics Letters · 2011 · 62 citations

Non-volatile Memory, Engineering, Vlsi Design +18

A 6K-gate CMOS gate array

H. Tago, T. Kobayashi, M. Kobayashi et al. · IEEE Journal of Solid-State Circuits · 1982 · 17 citations

Low-power Electronics, Electrical Engineering, Engineering +10

A 256K CMOS SRAM with variable impedance data-line loads

S. Yamamoto, N. Tanimura, Kensaku Nagasawa et al. · IEEE Journal of Solid-State Circuits · 1985 · 16 citations

Hardware Security, Non-volatile Memory, Electrical Engineering +11

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