A.K. Nanda

Energy optimization of multilevel cache architectures for RISC and CISC processors

U. Ko, Poras T. Balsara, A.K. Nanda · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1998 · 59 citations

Engineering, Energy Efficiency, Computer Architecture +18

Accuracy and speed-up of parallel trace-driven architectural simulation

Anh Tu Nguyen, Pradip Bose, Kattamuri Ekanadham et al. · 2002 · 38 citations

Engineering, Computer Architecture, Simulation +17

Design and performance of directory caches for scalable shared memory multiprocessors

M.M. Michael, A.K. Nanda · 1999 · 36 citations

Cluster Computing, Storage Performance, Engineering +19

Scheduling directed task graphs on multiprocessors using simulated annealing

A.K. Nanda, Doug DeGroot, D.L. Stenger · 2003 · 32 citations

Cluster Computing, Engineering, Computer Architecture +22

Cell/B.E. blades: Building blocks for scalable, real-time, interactive, and digital media servers

A.K. Nanda, J. Randal Moulic, Robert Hanson et al. · IBM Journal of Research and Development · 2007 · 29 citations

Cluster Computing, Building Blocks, Engineering +20