Ping‐Ying Wang

15.3 A 2.4GHz ADPLL with digital-regulated supply-noise-insensitive and temperature-self-compensated ring DCO

Yi-Chieh Huang, Che-Fu Liang, Hsien-Sheng Huang et al. · 2014 · 76 citations

Low-power Electronics, Electrical Engineering, Engineering +11

A Digital Intensive Fractional-N PLL and All-Digital Self-Calibration Schemes

Ping‐Ying Wang, Jing-Hong Conan Zhan, Hsiang-Hui Chang et al. · IEEE Journal of Solid-State Circuits · 2009 · 59 citations

Sensor Calibration, Engineering, Measurement +15

A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE

Hsiang-Hui Chang, Ping‐Ying Wang, Jing-Hong Conan Zhan et al. · 2008 · 49 citations

Fractional Spurs, Fractional Spur-free Adpll, Data Converter +8

An All-Digital Jitter Tolerance Measurement Technique for CDR Circuits

Yi-Chieh Huang, Ping‐Ying Wang, Shen-Iuan Liu · IEEE Transactions on Circuits & Systems II Express Briefs · 2012 · 24 citations

Cdr Circuit, Engineering, Measured Jitter Tolerance +14

10.8 A wideband fractional-N ring PLL using a near-ground pre-distorted switched-capacitor loop filter

Che-Fu Liang, Ping‐Ying Wang · 2015 · 20 citations

Double Sampling, Data Converter, Analog Design +6