J.L. Neves

Figures of merit to characterize the importance of on-chip inductance

Yehea Ismail, Eby G. Friedman, J.L. Neves · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1999 · 214 citations

Engineering, Computer Engineering, Electrical Engineering +16

Equivalent Elmore delay for RLC trees

Yehea Ismail, Eby G. Friedman, J.L. Neves · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2000 · 203 citations

Engineering, Electrical Engineering, Analog Electronics +15

Figures of merit to characterize the importance of on-chip inductance

Yehea Ismail, Eby G. Friedman, J.L. Neves · 1998 · 97 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +16

Optimal clock skew scheduling tolerant to process variations

J.L. Neves, Eby G. Friedman · 1996 · 95 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +17

Design methodology for synthesizing clock distribution networks exploiting nonzero localized clock skew

J.L. Neves, Eby G. Friedman · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1996 · 56 citations

Engineering, Computer Engineering, Electrical Engineering +17