CMOS-Analogous Wafer-Scale Nanotube-on-Insulator Approach for Submicrometer Devices and Integrated Circuits Using Aligned Nanotubes

Koungmin Ryu, Alexander Badmaev, Chuan Wang, +7

Nano Letters

EngineeringDevice IntegrationIntegrated CircuitsNanocomputingSemiconductor Device +14

Antimicrobial Behavior of Polyelectrolyte Multilayer Films Containing Cetrimide and Silver

Jaime C. Grunlan, John Choi, Albert Lin

Biomacromolecules

Macromolecular ChemistryEngineeringResponsive PolymersAltmetric Attention ScorePolymers +16

Carbon Nanotube Robust Digital VLSI

Jie Zhang, Albert Lin, Nishant Patil, +4

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

EngineeringVlsi DesignField-effect TransistorsNanocomputingCircuit System +14

VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using Carbon Nanotube FETs

Nishant Patil, Albert Lin, Jie Zhang, +4

EngineeringVlsi DesignIntegrated CircuitsNanocomputingInterconnect (Integrated Circuits) +18

Scalable Carbon Nanotube Computational and Storage Circuits Immune to Metallic and Mispositioned Carbon Nanotubes

Nishant Patil, Albert Lin, Jie Zhang, +4

IEEE Transactions on Nanotechnology

EngineeringVlsi DesignLarge Scale IntegrationNanocomputingCarbon-based Material +19

Integrated wafer-scale growth and transfer of directional Carbon Nanotubes and misaligned-Carbon-Nanotube-immune logic structures

Nishant Patil, Albert Lin, Edward R. Myers, +2

EngineeringNanocomputingWafer Scale ProcessingNanoelectronicsNanonetwork +16

Device study, chemical doping, and logic circuits based on transferred aligned single-walled carbon nanotubes

Chuan Wang, Koungmin Ryu, Alexander Badmaev, +5

Applied Physics Letters

Chemical DopingEngineeringNanocomputingPower ElectronicsSemiconductor Device +15

Carbon nanotube correlation

Jie Zhang, Shashikanth Bobba, Nishant Patil, +4

EngineeringVlsi DesignNanocomputingDirectional Cnt GrowthPhysical Design (Electronics) +14

Digital VLSI logic technology using Carbon Nanotube FETs

Nishant Patil, Albert Lin, Jie Zhang, +2

EngineeringVlsi DesignNanocomputingCircuit SystemNanoelectronics +14

Current Scaling in Aligned Carbon Nanotube Array Transistors With Local Bottom Gating

Aaron D. Franklin, Albert Lin, H.‐S. Philip Wong, +1

IEEE Electron Device Letters

EngineeringNanodevicesCarbon NanotechnologyDevice GeometryNanocomputing +16