21:I[432972,["/_next/static/chunks/bb923814e1f4d2e9.js","/_next/static/chunks/dd3ee9f5b7716ca6.js","/_next/static/chunks/4204a0ae82542ca8.js","/_next/static/chunks/1270dead247da766.js","/_next/static/chunks/6e1aa89a642f40be.js","/_next/static/chunks/2d7aa753e81324a8.js","/_next/static/chunks/8ffd0b71567920d8.js","/_next/static/chunks/67ea6dfd21f16c5f.js","/_next/static/chunks/24eb4379f68013fd.js","/_next/static/chunks/b8cd775ffdf935bd.js","/_next/static/chunks/983103cd9eb7b428.js","/_next/static/chunks/263f2cdcb9aa2341.js","/_next/static/chunks/294b9525248c8e5f.js"],"default"] 22:T54e,This paper presents a low temperature coefficient (TC) CMOS BGR for high-performance multi-channel analog-to-digital converter (ADC) working under wide temperature range. Besides the logarithmic compensation, both leakage and piecewise curvature compensation are implemented to extend its operating temperature range and keep its low TC. A

$\beta $

-compensation technique is used to cancel the PTAT and non-PTAT spread of the output due to variation of limited

$\beta $

in the Bipolar Junction Transistors. Moreover, the error-correcting resistors are implemented to eliminate the first-order inaccuracy of the output. The BGR designed in

$0.18~\mu \text{m}$

1.8-/5-V CMOS process has a minimum simulated TC of 0.42ppm/°C over a wide temperature of −60°C to 150 °C, making it appropriate to provide reference voltage for a high-precision ADC for sensor interface.

#	Concept	H-Index	Publications	Citations
1	Engineering	2	2	53
2	Electrical Engineering	2	2	53
3	Microelectronics	2	2	53
4	Computer Engineering	1	1	40
5	Instrumentation	1	1	40

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