Ruoyang Liu

7.5 A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm²and 6T HBST-TRAM-Based 2D Data-Reuse Architecture

Jinshan Yue, Ruoyang Liu, Wenyu Sun et al. · 2019 · 43 citations

Engineering, Machine Learning, Neural Networks (Machine Learning) +25

14.2 A 65nm 24.7µJ/Frame 12.3mW Activation-Similarity-Aware Convolutional Neural Network Video Processor Using Hybrid Precision, Inter-Frame Data Reuse and Mixed-Bit-Width Difference-Frame Data Codec

Zhe Yuan, Yixiong Yang, Jinshan Yue et al. · 2020 · 29 citations

Convolutional Neural Network, Engineering, Image Signal Processing +17

A 65-nm Energy-Efficient Interframe Data Reuse Neural Network Accelerator for Video Applications

Yixiong Yang, Yongpan Liu, Zhe Yuan et al. · IEEE Journal of Solid-State Circuits · 2021 · 15 citations

STICKER-T: An Energy-Efficient Neural Network Processor Using Block-Circulant Algorithm and Unified Frequency-Domain Acceleration

Jinshan Yue, Yongpan Liu, Ruoyang Liu et al. · IEEE Journal of Solid-State Circuits · 2020 · 14 citations

Edge Intelligence, Unified Workflow, Unified Nn Processor +14

An N-way group association architecture and sparse data group association load balancing algorithm for sparse CNN accelerators

Jingyu Wang, Zhe Yuan, Ruoyang Liu et al. · 2019 · 12 citations

Engineering, Hardware Acceleration, Edge Computing +13