D. Duarte

Evaluating Run-Time Techniques for Leakage Power Reduction

D. Duarte, Yuh-Fang Tsai, Vijaykrishnan Narayanan et al. · 2002 · 105 citations

Engineering, Computer Engineering, Computer Science +17

A clock power model to evaluate impact of architectural and technology optimizations

D. Duarte, N. Vijaykrishnan, M.J. Irwin · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2002 · 94 citations

Engineering, Computer Engineering, Electrical Engineering +17

Compact BJT-Based Thermal Sensor for Processor Applications in a 14 nm tri-Gate CMOS Process

Takao Oshita, Joseph Shor, D. Duarte et al. · IEEE Journal of Solid-State Circuits · 2015 · 91 citations

Engineering, Computer Engineering, Electrical Engineering +15

Petrographic microfacies classification with deep convolutional neural networks

Rafael Pires de Lima, D. Duarte, Charles Nicholson et al. · Computers & Geosciences · 2020 · 82 citations

Computing, Computer Science, Computer Vision +13

Evaluating run-time techniques for leakage power reduction

D. Duarte, Yuh-Fang Tsai, N. Vijaykrishnan et al. · Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design · 2002 · 69 citations

Engineering, Computer Engineering, Computer Science +17