Jérémy Schlachter

Statistics

Publications

Citations

316

H-Index

Active since

2015

Affiliations

École Polytechnique Fédérale de Lausanne(Current)

Rice University

Indian Institute of Technology Madras

University of Oxford

Jérémy Schlachter is an author at École Polytechnique Fédérale de Lausanne specializing in computer architecture, low-power digital circuit design, and engineering.

ORCID

Publications per year

2015–2018

Publications

Design and Applications of Approximate Circuits by Gate-Level Pruning

Jérémy Schlachter, Vincent Camus, Krishna V. Palem et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2017 · 98 citations · Full text

Engineering, Computer Engineering, Computer Science +17

Approximate 32-bit floating-point unit design with 53% power-area product reduction

Vincent Camus, Jérémy Schlachter, Christian Enz et al. · 2016 · 39 citations · Full text

Engineering, Computer Engineering, Computer Science +17

A low-power <i>carry cut-back</i> approximate adder with fixed-point implementation and floating-point precision

Vincent Camus, Jérémy Schlachter, Christian Enz · 2016 · 33 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +17

Energy-efficient inexact speculative adder with high performance and accuracy control

Vincent Camus, Jérémy Schlachter, Christian Enz · 2015 · 30 citations · Full text

Engineering, Computer Engineering, Computer Science +17

Automatic generation of inexact digital circuits by gate-level pruning

Jérémy Schlachter, Vincent Camus, Christian Enz et al. · 2015 · 27 citations · Full text

Engineering, Computer Engineering, Digital Design +17

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