Aditya Yanamandra

A low-power phase change memory based hybrid cache architecture

Prasanth Mangalagiri, K. Sarpatwari, Aditya Yanamandra et al. · 2008 · 61 citations

Hardware Security, Non-volatile Memory, Electrical Engineering +15

On the Effects of Process Variation in Network-on-Chip Architectures

Chrysostomos Nicopoulos, Suresh Srinivasan, Aditya Yanamandra et al. · IEEE Transactions on Dependable and Secure Computing · 2008 · 59 citations

Hardware Security, System On Chip, Electrical Engineering +15

RAFT: A router architecture with frequency tuning for on-chip networks

Asit Mishra, Aditya Yanamandra, Reetuparna Das et al. · Journal of Parallel and Distributed Computing · 2010 · 26 citations

System On Chip, Engineering, Router Architecture +6

Optimizing power and performance for reliable on-chip networks

Aditya Yanamandra, Soumya Eachempati, Niranjan Soundararajan et al. · Asia and South Pacific Design Automation Conference · 2010 · 14 citations

Engineering, Information Security, Computer Architecture +18

Variation-Aware Low-Power Buffer Design

Chrysostomos Nicopoulos, Aditya Yanamandra, Suresh Srinivasan et al. · Conference record/Conference record - Asilomar Conference on Signals, Systems, & Computers · 2007 · 11 citations

Hardware Security, System On Chip, Electrical Engineering +12