Francisco García-Herrero

Simplified Trellis Min–Max Decoder Architecture for Nonbinary Low-Density Parity-Check Codes

Jesus O. Lacruz, Francisco García-Herrero, David Declercq et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014 · 46 citations · Full text

Hardware Security, Engineering, Error Correction Code +12

Non-Binary LDPC Decoder Based on Symbol Flipping with Multiple Votes

Francisco García-Herrero, David Declercq, Javier Valls · IEEE Communications Letters · 2014 · 35 citations · Full text

Engineering, Syndrome Computations, New Algorithm +9

One Minimum Only Trellis Decoder for Non-Binary Low-Density Parity-Check Codes

Jesus O. Lacruz, Francisco García-Herrero, Javier Valls et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2014 · 31 citations · Full text

Omo T-mm, Engineering, Joint Source-channel Coding +13

Reduced-Complexity Nonbinary LDPC Decoder for High-Order Galois Fields Based on Trellis Min–Max Algorithm

Jesus O. Lacruz, Francisco García-Herrero, María José Canet et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2016 · 31 citations · Full text

Cn Processor, Engineering, High-order Galois Fields +10

Syndrome-Based Min-Sum vs OSD-0 Decoders: FPGA Implementation and Analysis for Quantum LDPC Codes

Javier Valls, Francisco García-Herrero, Nithin Raveendran et al. · IEEE Access · 2021 · 28 citations · Full text

Engineering, Iterative Decoding, Error Correction Codes +19