Mohammad Taherzadeh‐Sani

A 1-V Process-Insensitive Current-Scalable Two-Stage Opamp With Enhanced DC Gain and Settling Behavior in 65-nm Digital CMOS

Mohammad Taherzadeh‐Sani, Anas A. Hamoui · IEEE Journal of Solid-State Circuits · 2011 · 75 citations

65-Nm Digital Cmos, Enhanced Dc Gain, Data Converter +9

A 170-dB $\Omega $ CMOS TIA With 52-pA Input-Referred Noise and 1-MHz Bandwidth for Very Low Current Sensing

Mohammad Taherzadeh‐Sani, Said Hussaini, Hamidreza Rezaee-Dehsorkh et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2017 · 46 citations

Low-power Electronics, Electrical Engineering, 52-Pa Input-referred Noise +14

Design optimization of analog integrated circuits using simulation-based genetic algorithm

Mohammad Taherzadeh‐Sani, Reza Lotfi, H. Zare-Hoseini et al. · 2004 · 40 citations

Electrical Engineering, Engineering, Circuit Design +11

Digital Background Calibration of Capacitor-Mismatch Errors in Pipelined ADCs

Mohammad Taherzadeh‐Sani, Anas A. Hamoui · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2006 · 39 citations

Multibit Mdacs, Engineering, Analog-to-digital Converter +13

A Low-Voltage High-Precision Time-Domain Winner-Take-All Circuit

Ehsan Rahiminejad, Mehdi Saberi, Reza Lotfi et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2019 · 24 citations

Low-power Electronics, Electrical Engineering, Digital Winner-take-all +14