Balaji Venu

A Triple Core Lock-Step (TCLS) ARM® Cortex®-R5 Processor for Safety-Critical and Ultra-Reliable Applications

Xabier Iturbe, Balaji Venu, Emre Özer et al. · 2016 · 61 citations

Tcls Architecture, Engineering, Computer Architecture +18

The Arm Triple Core Lock-Step (TCLS) Processor

Xabier Iturbe, Balaji Venu, Emre Özer et al. · ACM Transactions on Computer Systems · 2018 · 50 citations

Tcls Architecture, Engineering, Arm Dcls Processors +16

Soft error vulnerability assessment of the real-time safety-related ARM Cortex-R5 CPU

Xabier Iturbe, Balaji Venu, Emre Özer · 2016 · 38 citations

Engineering, Computer Architecture, Embedded Systems +21

Addressing Functional Safety Challenges in Autonomous Vehicles with the Arm TCL S Architecture

Xabier Iturbe, Balaji Venu, Juergen Jagst et al. · IEEE Design and Test · 2018 · 31 citations

Triple Modular Redundancy, Engineering, Computer Architecture +20

Multi-core processors - An overview

Balaji Venu · arXiv (Cornell University) · 2011 · 26 citations · Full text

Data Level Parallelism, Engineering, Many-core Architecture +13