Pierre-Yves Calland

Circuit retiming applied to decomposed software pipelining

Pierre-Yves Calland, Alain Darte, Yves Robert · IEEE Transactions on Parallel and Distributed Systems · 1998 · 50 citations

Computing, Computer Engineering, Computer Science +12

Tiling with limited resources

Pierre-Yves Calland, J. Dongarra, Yves Robert · 2002 · 22 citations · Full text

Computing, Computer Engineering, Computer Science +16

Precise tiling for uniform loop nests

Pierre-Yves Calland, Tanguy Risset · 2002 · 19 citations

Computing, Computer Engineering, Computer Science +13

Retiming DAGs [direct acyclic graph]

Pierre-Yves Calland, Anne Mignotte, O. Peyran et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1998 · 18 citations

Engineering, Computer Engineering, Computer Science +15

Plugging anti and output dependence removal techniques into loop parallelization algorithm

Pierre-Yves Calland, Alain Darte, Yves Robert et al. · Parallel Computing · 1997 · 14 citations

Computing, Computer Engineering, Computer Science +14