Chandan Karfa

An Equivalence-Checking Method for Scheduling Verification in High-Level Synthesis

Chandan Karfa, D. Sarkar, Chittaranjan Mandal et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2008 · 67 citations

Engineering, Verification, Computer Architecture +20

Verification of Code Motion Techniques Using Value Propagation

Kunal Banerjee, Chandan Karfa, Dipankar Sarkar et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2014 · 54 citations

Engineering, Verification, Computer Architecture +20

Formal verification of code motion techniques using data-flow-driven equivalence checking

Chandan Karfa, Chittaranjan Mandal, Dipankar Sarkar · ACM Transactions on Design Automation of Electronic Systems · 2012 · 41 citations

Program Checking, Engineering, Verification +19

A Formal Verification Method of Scheduling in High-level Synthesis

Chandan Karfa, Chittaranjan Mandal, D. Sarkar et al. · 2006 · 36 citations

Formal Method, Formal Specification, Engineering +15

Verification of Datapath and Controller Generation Phase in High-Level Synthesis of Digital Circuits

Chandan Karfa, Dipankar Sarkar, Chittaranjan Mandal · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2010 · 29 citations

Engineering, Hardware Verification Language, Verification +20