Partitioned ROBDDs-a compact, canonical and efficiently manipulable representation for Boolean functions

A. Narayan, J. Jain, Masahiro Fujita, +1

Mathematical ProgrammingCircuit ComplexityEngineeringBoolean FunctionComputer Architecture +18

Testing, verification, and diagnosis in the presence of unknowns

Alok Jain, V. Boppana, Rajarshi Mukherjee, +3

Fault DiagnosisEngineeringVerificationDiagnosisComputer-aided Verification +18

Indexed BDDs: algorithmic advances in techniques to represent and verify Boolean functions

J. Jain, J. Bitner, Magdy S. Abadir, +2

IEEE Transactions on Computers

Circuit ComplexityEngineeringBoolean FunctionVerificationComputer-aided Verification +18

Probabilistic design verification

J. Jain, J. Bitner, Donald S. Fussell, +1

Deterministic VerificationEngineeringBoolean FunctionBoolean FunctionsAutomated Reasoning +12

IBDDs: an efficient functional representation for digital circuits

J. Jain, Magdy S. Abadir, J. Bitner, +2

Circuit ComplexityEngineeringBoolean FunctionElectronic Design AutomationElectronic Design +19

Formal verification of combinational circuits

J. Jain, A. Narayan, Masahiro Fujita, +1

Circuit ComplexityEngineeringVerificationComputer-aided VerificationCombinational Verification +14

Multiple error diagnosis based on Xlists

V. Boppana, Rajarshi Mukherjee, J. Jain, +2

Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361)

Large MultiplicityEngineeringIntelligent DiagnosticsVerificationDiagnosis +19

Functional learning: a new approach to learning in digital circuits

Rajarshi Mukherjee, J. Jain, Dhiraj K. Pradhan

Circuit ComplexityEngineeringMachine LearningFunctional LearningTest Data Generation +18

A survey of techniques for formal verification of combinational circuits

J. Jain, A. Narayan, Masahiro Fujita, +1

EngineeringVerificationComputer-aided VerificationCombinational VerificationModel Checking +17

An efficient filter-based approach for combinational verification

Rajarshi Mukherjee, J. Jain, K. Takayama, +3

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Robust Verification MethodologyEngineeringVerificationComputer-aided VerificationCombinational Verification +15