Chak-Wa Pui - Concepedia

Author

Chak-Wa Pui

Chinese University of Hong Kong

Also Known As

Chak-Wa Pui

Publications

460

Citations

H-Index

Concepts

All Affiliations

Chinese University of Hong Kong

About

Chak-Wa Pui is an author at Chinese University of Hong Kong specializing in computer engineering, engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	9	9	401
2	Computer Engineering	9	9	401
3	Computer Science	7	7	324
4	Education	1	1	27
5	Social Sciences	1	1	55

Chak-Wa Pui

Publications

430

Citations

H-Index

Page 1

	Year	Citations
CUGR: Detailed-Routability-Driven 3D Global Routing with Probabilistic Resource Model Jinwei Liu, Chak-Wa Pui, Fangzhou Wang, EngineeringNetwork RoutingNetwork AnalysisOperations ResearchGlobal Router	2020	80
Legalization algorithm for multiple-row height standard cell design Wing-Kai Chow, Chak-Wa Pui, Evangeline F. Y. Young Industrial DesignPhysical Design (Electronics)EngineeringLegalization AlgorithmLegalization Techniques	2016	55
RippleFPGA Chak-Wa Pui, Gengjie Chen, Wing-Kai Chow, Cluster ComputingHeterogeneous ComputingEngineeringAdvanced ComputingComputer Architecture	2016	55
RippleFPGA: Routability-Driven Simultaneous Packing and Placement for Modern FPGAs Gengjie Chen, Chak-Wa Pui, Wing-Kai Chow, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringComputer ArchitectureHardware SystemsHardware ArchitectureHardware Verification Languages	2017	54
Clock-aware ultrascale FPGA placement with machine learning routability prediction: (Invited paper) Chak-Wa Pui, Gengjie Chen, Yuzhe Ma, 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) EngineeringHardware AlgorithmComputer ArchitectureHardware SecurityHigh-performance Architecture	2017	43
Dr. CU: Detailed Routing by Sparse Grid Graph and Minimum-Area-Captured Path Search Gengjie Chen, Chak-Wa Pui, Haocheng Li, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Cluster ComputingEngineeringNetwork RoutingComputer ArchitectureNetwork Analysis	2019	39
Detailed routing by sparse grid graph and minimum-area-captured path search Gengjie Chen, Chak-Wa Pui, Haocheng Li, Cluster ComputingEngineeringNetwork RoutingComputer ArchitectureNetwork Analysis	2019	27
Clock-aware ultrascale FPGA placement with machine learning routability prediction Chak-Wa Pui, Gengjie Chen, Yuzhe Ma, International Conference on Computer Aided Design Hardware SecurityExperimental ResultsIspd 2017Routability PredictionEngineering	2017	26
Device Layer-Aware Analytical Placement for Analog Circuits Biying Xu, Shaolan Li, Chak-Wa Pui, Electrical EngineeringGlobal RoutingEngineeringVlsi DesignCircuit Design	2019	22
Heterogeneous Graph Neural Network-Based Imitation Learning for Gate Sizing Acceleration Xinyi Zhou, Junjie Ye, Chak-Wa Pui, Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design	2022	17

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