Klaas L. Hofstra

10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS

Amin Shokrollahi, Dario Albino Carnelli, John Fox et al. · 2016 · 56 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +16

A 1.02-pJ/b 20.83-Gb/s/Wire USR Transceiver Using CNRZ-5 in 16-nm FinFET

Armin Tajalli, Mani Bastani Parizi, Dario Albino Carnelli et al. · IEEE Journal of Solid-State Circuits · 2020 · 43 citations

Engineering, Computer Engineering, Electrical Engineering +17

26.3 A pin- and power-efficient low-latency 8-to-12Gb/s/wire 8b8w-coded SerDes link for high-loss channels in 40nm technology

Anant Singh, Dario Albino Carnelli, Altay Falay et al. · 2014 · 17 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +15

THE EUROPEAN RAIL RESEARCH ADVISORY COUNCIL (ERRAC): DEFINING THE STRATEGIC RAIL RESEARCH AGENDA FOR 2020

Klaas L. Hofstra · Rail international · 2002 · 17 citations

Public Affairs, Strategy, Transportation Planning +14

A 1.02pJ/b 417Gb/s/mm USR Link in 16nm FinFET

Armin Tajalli, M. H. Bastani, Dario Albino Carnelli et al. · 2019 · 11 citations

Engineering, Computer Engineering, Electrical Engineering +15