Georgios Karakonstantis

Author

Purdue University West Lafayette ORCID

Also Known As

G Karakonstantis, G. Karakonstantis, Georgios Karakonstantis, Karakonstantis, Georgios

133

Publications

1.2K

Citations

H-Index

100

Concepts

All Affiliations

Purdue University West Lafayette Queen's University Belfast École Polytechnique Fédérale de Lausanne Virginia Tech University of Thessaly

About

Georgios Karakonstantis is an author at Purdue University West Lafayette specializing in computer architecture, computer engineering, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	19	38	958
2	Computer Engineering	19	38	958
3	Education	1	1	18
4	Medicine	1	1	13
5	Social Sciences	1	1	14

Georgios Karakonstantis

Publications

987

Citations

H-Index

Page 1

	Year	Citations
Significance driven computation Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy EngineeringVlsi DesignStatistical FoundationSignificance DrivenComputer Architecture	2009	93
Process variation tolerant low power DCT architecture Nilanjan Banerjee, Georgios Karakonstantis, Kaushik Roy Design, Automation, and Test in Europe Low-power ElectronicsElectrical EngineeringLossy CompressionEngineeringImage Coding	2007	61
Voltage Scalable High-Speed Robust Hybrid Arithmetic Units Using Adaptive Clocking Swaroop Ghosh, Debabrata Mohapatra, Georgios Karakonstantis, IEEE Transactions on Very Large Scale Integration (VLSI) Systems Hardware SecurityLow-power ElectronicsElectrical EngineeringAdaptive ClockEngineering	2009	60
Process Variation Tolerant Low Power DCT Architecture Nilanjan Banerjee, Georgios Karakonstantis, Kaushik Roy Low-power ElectronicsElectrical EngineeringLossy CompressionEngineeringImage Compression	2007	54
Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment Jeremy Constantin, Lai Wang, Georgios Karakonstantis, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 EngineeringVlsi DesignComputer ArchitectureTiming ViolationsProcessor Architecture	2015	42
Process-Variation Resilient and Voltage-Scalable DCT Architecture for Robust Low-Power Computing Georgios Karakonstantis, Nilanjan Banerjee, Kaushik Roy IEEE Transactions on Very Large Scale Integration (VLSI) Systems EngineeringVlsi DesignPower Optimization (Eda)Computer ArchitectureAggressive Voltage Scaling	2009	40
Low-power process-variation tolerant arithmetic units using input-based elastic clocking Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy EngineeringVlsi DesignEnergy EfficiencyPower Optimization (Eda)Process-variation Tolerant Architecture	2007	38
System level DSP synthesis using voltage overscaling, unequal error protection &#x00026; adaptive quality tuning Georgios Karakonstantis, Debabrata Mohapatra, Kaushik Roy EngineeringVlsi DesignPower Optimization (Eda)Analog DesignComputer Architecture	2009	34
Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment Jeremy Constantin, Lai Wang, Georgios Karakonstantis, Design, Automation, and Test in Europe EngineeringVlsi DesignComputer ArchitectureTiming ViolationsProcessor Architecture	2015	32
Mitigating the impact of faults in unreliable memories for error-resilient applications Shrikanth Ganapathy, Georgios Karakonstantis, Adam Teman, Error-resilient ApplicationsEngineeringMachine LearningError Control TechniqueMem Testing	2015	29

Page 1