Sari Onaissi

A fast approach for static timing analysis covering all PVT corners

Sari Onaissi, Feroze Taraporevala, Jinfeng Liu et al. · 2011 · 27 citations

Engineering, Vlsi Design, Computer Architecture +18

A Linear-Time Approach for Static Timing Analysis Covering All Process Corners

Sari Onaissi, Farid N. Najm · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2008 · 25 citations

Engineering, Vlsi Design, Industrial Engineering +23

PSTA-based branch and bound approach to the silicon speedpath isolation problem

Sari Onaissi, Khaled R. Heloue, Farid N. Najm · 2009 · 21 citations

Engineering, Vlsi Design, Logic Paths +17

Efficient block-based parameterized timing analysis covering all potentially critical paths

Khaled R. Heloue, Sari Onaissi, Farid N. Najm · International Conference on Computer Aided Design · 2008 · 10 citations

Critical Paths, Parameter Space, Engineering +22

A linear-time approach for static timing analysis covering all process corners

Sari Onaissi, Farid N. Najm · Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design · 2006 · 10 citations

Engineering, Vlsi Design, Industrial Engineering +22