Zhao Chuan Lee

0.77 fJ/bit/search Content Addressable Memory Using Small Match Line Swing and Automated Background Checking Scheme for Variation Tolerance

Anh Tuan, Chun Yin, Kavitha Velayudhan et al. · IEEE Journal of Solid-State Circuits · 2014 · 49 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +17

0.2 V 8T SRAM With PVT-Aware Bitline Sensing and Column-Based Data Randomization

Anh Tuan, Zhao Chuan Lee, Bo Wang et al. · IEEE Journal of Solid-State Circuits · 2016 · 26 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +14

A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI

M. Sultan M. Siddiqui, Zhao Chuan Lee, Tony Tae-Hyoung Kim · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2021 · 20 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 32 kb 9T near-threshold SRAM with enhanced read ability at ultra-low voltage operation

Tony Tae-Hyoung Kim, Zhao Chuan Lee, Anh Tuan · Solid-State Electronics · 2017 · 12 citations

Engineering, Computer Engineering, Electrical Engineering +15

Improving uniformity and reliability of SRAM PUFs utilizing device aging phenomenon for unique identifier generation

Achiranshu Garg, Zhao Chuan Lee, Lu Lu et al. · Microelectronics Journal · 2019 · 10 citations

Engineering, Computer Engineering, Electrical Engineering +14