B. Seger

A 1.5V 200MS/s 13b 25mW DAC with Randomized Nested Background Calibration in 0.13¿m CMOS

Martin Clara, Wolfgang Klatzer, B. Seger et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2007 · 32 citations

Electrical Engineering, Engineering, Circuit System +13

Fully analogue LMS adaptive notch filter in BICMOS technology

T. Linder, H. Zojer, B. Seger · IEEE Journal of Solid-State Circuits · 1996 · 16 citations

Stability Analysis, Process Deviations, Engineering +11

A 1.5V 13bit 130-300MS/s self-calibrated DAC with active output stage and 50MHz signal bandwidth in 0.13μm CMOS

Martin Clara, Wolfgang Klatzer, Daniel Gruber et al. · 2008 · 14 citations

Dynamic Linearity, Engineering, Calibration +12

An ADSL-RT full-rate analog front end IC with integrated line driver

H. Weinberger, Andreas Wiesbauer, C. Fleischhacker et al. · IEEE Journal of Solid-State Circuits · 2002 · 12 citations

Electrical Engineering, Engineering, Etsi Standards +10

A 1.8V 450mW VDSL 4-band analog front end IC in 0.18μm CMOS

H. Weinberger, Andreas Wiesbauer, Martin Clara et al. · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2005 · 12 citations

Electrical Engineering, Engineering, Mixed-signal Integrated Circuit +4