Xiuyuan Bi

Multi retention level STT-RAM cache designs with a dynamic refresh scheme

Zhenyu Sun, Xiuyuan Bi, Hai Li et al. · 2011 · 219 citations

Engineering, Computer Engineering, Electrical Engineering +17

Probabilistic design methodology to improve run-time stability and performance of STT-RAM caches

Xiuyuan Bi, Zhenyu Sun, Hai Li et al. · 2012 · 72 citations

Engineering, Computer Engineering, Computer Science +17

STT-RAM Cache Hierarchy With Multiretention MTJ Designs

Zhenyu Sun, Xiuyuan Bi, Hai Li et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2013 · 49 citations

Engineering, Computer Engineering, Computer Science +17

Unleashing the potential of MLC STT-RAM caches

Xiuyuan Bi, Mengjie Mao, Danghui Wang et al. · 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) · 2013 · 39 citations

Engineering, Computer Engineering, Computer Science +16

STT-RAM Cell Design Considering CMOS and MTJ Temperature Dependence

Xiuyuan Bi, Hai Li, Xiaobin Wang · IEEE Transactions on Magnetics · 2012 · 32 citations

Engineering, Computer Engineering, Electrical Engineering +15