Teruo Seki

A 6-ns 1-Mb CMOS SRAM with latched sense amplifier

Teruo Seki, E. Itoh, Chiaki Furukawa et al. · IEEE Journal of Solid-State Circuits · 1993 · 65 citations

Engineering, Memory Design, Vlsi Design +17

A 1 V operating 256-Kbit full CMOS SRAM

A. Sekiyama, Teruo Seki, Shuichi Nagai et al. · 1990 · 22 citations

N-channel Transistor, Electrical Engineering, Engineering +13

A 1-V operating 256-kb full-CMOS SRAM

A. Sekiyama, Teruo Seki, Shuichi Nagai et al. · IEEE Journal of Solid-State Circuits · 1992 · 20 citations

Hardware Security, Low-power Electronics, Electrical Engineering +12

A 333 MHz, 20 mW, 18 ps resolution digital DLL using current-controlled delay with parallel variable resistor DAC (PVR-DAC)

S. Eto, Keigo Isobe, Kenji Tsuchida et al. · 2002 · 10 citations

Current-controlled Delay, Current Controlled-delay Element, Data Converter +7

A 6-ns 1-Mb CMOS SRAM with Latched Sense Amplifier

Teruo Seki, E. Itoh, Chiaki Furukawa et al. · IEICE Transactions on Electronics · 1993 · 10 citations

Access Time, Cell Size, Cmos Sram +10