Sarath Mohanachandran Nair

Statistics

Publications

Citations

179

H-Index

Active since

2017

Affiliations

Karlsruhe Institute of Technology(Current)

Sarath Mohanachandran Nair is an author at Karlsruhe Institute of Technology specializing in spin-transfer torque memory, computer engineering, and memory.

ORCID

Publications per year

2017–2020

Publications

Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM

Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi B. Tahoori et al. · 2018 · 39 citations

Engineering, Computer Engineering, Electrical Engineering +17

A Spintronics Memory PUF for Resilience Against Cloning Counterfeit

Samir Ben Dodo, Rajendra Bishnoi, Sarath Mohanachandran Nair et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2019 · 33 citations

Computing, Computer Engineering, Electrical Engineering +16

VAET-STT: Variation Aware STT-MRAM Analysis and Design Space Exploration Tool

Sarath Mohanachandran Nair, Rajendra Bishnoi, Mohammad Saber Golanbari et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2017 · 24 citations

Engineering, Computer Engineering, Computer Systems +17

Defect Characterization and Test Generation for Spintronic-based Compute-In-Memory

Sarath Mohanachandran Nair, Christopher Münch, Mehdi B. Tahoori · 2020 · 21 citations

Engineering, Computer Engineering, Electrical Engineering +17

Process variation and temperature aware adaptive scrubbing for retention failures in STT-MRAM

Nour Sayed, Sarath Mohanachandran Nair, Rajendra Bishnoi et al. · 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) · 2018 · 15 citations

Engineering, Computer Engineering, Computer Science +14

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