Paolo Meloni

Designing application-specific networks on chips with floorplan information

Srinivasan Murali, Paolo Meloni, Federico Angiolini et al. · Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design · 2006 · 205 citations · Full text

Engineering, Computer Engineering, Computer Science +17

Contrasting a NoC and a Traditional Interconnect Fabric with Layout Awareness

Federico Angiolini, Paolo Meloni, Salvatore Carta et al. · 2006 · 93 citations

Engineering, Computer Engineering, Computer Science +17

An FPGA Platform for Real-Time Simulation of Spiking Neuronal Networks

Danilo Pani, Paolo Meloni, Giuseppe Tuveri et al. · Frontiers in Neuroscience · 2017 · 89 citations · Full text

Engineering, Bioengineering, Computer Engineering +17

NoC Design and Implementation in 65nm Technology

Antonio Pullini, Federico Angiolini, Paolo Meloni et al. · 2007 · 63 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +17

A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs

Federico Angiolini, Paolo Meloni, Salvatore Carta et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2007 · 58 citations

Engineering, Computer Engineering, Computer Science +17