S. Navid Shahrouzi

Optimized hardware accelerators for data mining applications on embedded platforms: Case study principal component analysis

S. Navid Shahrouzi, Darshika G. Perera · Microprocessors and Microsystems · 2019 · 29 citations

Computing, Computer Engineering, Computer Science +17

Dynamic partial reconfigurable hardware architecture for principal component analysis on mobile and embedded devices

S. Navid Shahrouzi, Darshika G. Perera · EURASIP Journal on Embedded Systems · 2017 · 28 citations · Full text

Engineering, Computer Engineering, Computer Science +17

An efficient embedded multi-ported memory architecture for next-generation FPGAs

S. Navid Shahrouzi, Darshika G. Perera · 2017 · 21 citations

Engineering, Computer Engineering, Computer Science +11

Optimized Counter-Based Multi-Ported Memory Architectures for Next-Generation FPGAs

S. Navid Shahrouzi, Darshika G. Perera · 2018 · 15 citations

Engineering, Computer Engineering, Computer Science +11

Towards Composing Optimized Bi-Directional Multi-Ported Memories for Next-Generation FPGAs

S. Navid Shahrouzi, Arkan Alkamil, Darshika G. Perera · IEEE Access · 2020 · 14 citations · Full text

Engineering, Computer Engineering, Computer Science +12