Tom Eeckelaert

Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces

Tom Eeckelaert, Trent McConaghy, Georges Gielen · Design, Automation, and Test in Europe · 2005 · 95 citations

Architecture, Computer Engineering, Design +17

Performance space modeling for hierarchical synthesis of analog integrated circuits

Georges Gielen, Trent McConaghy, Tom Eeckelaert · 2005 · 52 citations

Architecture, Computer Science, Design Automation +13

CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming

Trent McConaghy, Tom Eeckelaert, Georges Gielen · Design, Automation, and Test in Europe · 2005 · 49 citations · Full text

Architecture, Computational Engineering, Evolutionary Design +15

7.3 A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOS

Dirk Pfaff, Muhammad Nummer, Noman Hai et al. · 2024 · 29 citations

Engineering, Computer Engineering, Electrical Engineering +17

Hierarchical bottom--up analog optimization methodology validated by a delta--sigma A/D converter design for the 802.11a/b/g standard

Tom Eeckelaert, Raf Schoofs, Georges Gielen et al. · 2006 · 26 citations

Engineering, Computer Engineering, Systems Engineering +16