Kea‐Tiong Tang - Concepedia

Author

Kea‐Tiong Tang

Also Known As

K TANG, K. T. Tang, K. Tang, K.T. Tang, Kailang Tang, Ke-Han Tang, Kea-Tiong Tang, Kea-tiong Tang, Kea‐Tiong Tang, Klinefelter

280

Publications

Citations

H-Index

182

Concepts

All Affiliations

National Tsing Hua University Industrial Technology Research Institute Taiwan Semiconductor Manufacturing Company (Taiwan)National Chung Hsing University Tishk International University

About

Kea‐Tiong Tang is an author at National Tsing Hua University specializing in engineering, computer engineering, and computer science.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	37	70	4.5K
2	Medicine	4	4	71
3	Education	3	3	152
4	Health Sciences	2	2	99
5	Natural Sciences	1	1	62

Kea‐Tiong Tang

104

Publications

5.6K

Citations

H-Index

Page 1

	Year	Citations
A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors Wei-Hao Chen, Kaixiang Li, Wei‐Yu Lin, Sub-16ns Multiply-and-accumulateConvolutional Neural NetworkEngineeringMachine LearningNeural Network	2018	320
24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors Cheng-Xin Xue, Wei-Hao Chen, Je-Syu Liu,	2019	282
24.5 A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning Xin Si, Jiajing Chen, Yung-Ning Tu, Binary Mac OperationsEngineeringMachine LearningHardware AccelerationEnergy Efficiency	2019	251
CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors Wei-Hao Chen, Chunmeng Dou, Kaixiang Li, Nature Electronics Non-volatile MemoryElectrical EngineeringEngineeringEdge ComputingComputer Architecture	2019	247
15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices Cheng-Xin Xue, Tsung-Yuan Huang, Je-Syu Liu,	2020	223
15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips Xin Si, Yung-Ning Tu, Wei-Hsing Huang, EngineeringMac OperationsHardware AccelerationEdge ComputingHigh-performance Architecture	2020	208
16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, EngineeringComputer ArchitectureMulti-channel Memory ArchitectureHigh-performance ArchitectureComputing Systems	2021	184
15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips Jian-Wei Su, Xin Si, Yen-Chi Chou, EngineeringEdge DeviceComputer ArchitectureTwt Multiply CellSram Compute-in-memory Macro	2020	178
16.1 A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices Cheng-Xin Xue, Je-Min Hung, Hui-Yao Kao, EngineeringEnergy EfficiencyEmerging Memory TechnologyComputer ArchitectureHardware Systems	2021	174
A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices Cheng-Xin Xue, Yen-Cheng Chiu, Ta-Wei Liu, Nature Electronics Hardware SecurityEngineeringVlsi ArchitectureEdge ComputingEmerging Memory Technology	2020	155

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