Deep Convolutional Neural Network Architecture With Reconfigurable Computation Patterns

Fengbin Tu, Shouyi Yin, Peng Ouyang, +3

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Dcnn AccelerationConvolutional Neural NetworkEngineeringComputer ArchitectureConvolution Mapping Method +14

A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications

Shouyi Yin, Peng Ouyang, Shibin Tang, +7

IEEE Journal of Solid-State Circuits

EngineeringEnergy EfficiencyComputer ArchitectureHardware SystemsMulti-channel Memory Architecture +16

A 28nm 29.2TFLOPS/W BF16 and 36.5TOPS/W INT8 Reconfigurable Digital CIM Processor with Unified FP/INT Pipeline and Bitwise In-Memory Booth Multiplication for Cloud Deep Learning Acceleration

Fengbin Tu, Yiqi Wang, Zihan Wu, +7

2022 IEEE International Solid- State Circuits Conference (ISSCC)

EngineeringAdvanced ComputingComputer ArchitectureUnified Fp/int PipelineData Science +15

DOTA: detect and omit weak attentions for scalable transformer acceleration

Zheng Qu, Liu Liu, Fengbin Tu, +3

Convolutional Neural NetworkEngineeringMachine LearningComputer ArchitectureImage Analysis +15

A 1.06-to-5.09 TOPS/W reconfigurable hybrid-neural-network processor for deep learning applications

Shouyi Yin, Peng Ouyang, Shibin Tang, +4

EngineeringEnergy EfficiencyComputer ArchitectureEmbedded SystemsHardware Systems +16

RANA: Towards Efficient Neural Acceleration with Refresh-Optimized Embedded DRAM

Fengbin Tu, Weiwei Wu, Shouyi Yin, +2

Many Cnn AcceleratorsEngineeringMachine LearningHardware AccelerationEdge Computing +12

TranCIM: Full-Digital Bitline-Transpose CIM-based Sparse Transformer Accelerator With Pipeline/Parallel Reconfigurable Modes

Fengbin Tu, Zihan Wu, Yiqi Wang, +7

IEEE Journal of Solid-State Circuits

ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration

Fengbin Tu, Yiqi Wang, Zihan Wu, +7

IEEE Journal of Solid-State Circuits

Artificial IntelligenceEngineeringFabricated Redcim ChipAdvanced ComputingComputer Architecture +16

A 28nm 15.59µJ/Token Full-Digital Bitline-Transpose CIM-Based Sparse Transformer Accelerator with Pipeline/Parallel Reconfigurable Modes

Fengbin Tu, Zihan Wu, Yiqi Wang, +7

2022 IEEE International Solid- State Circuits Conference (ISSCC)

EngineeringVlsi DesignMachine LearningComputer ArchitectureMemory Access +16

A High Throughput Acceleration for Hybrid Neural Networks With Efficient Resource Management on FPGA

Shouyi Yin, Shibin Tang, Xinhan Lin, +4

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Artificial IntelligenceEngineeringHardware AlgorithmComputer ArchitectureHybrid Computing +15