N. Patkar

Testing of Vega2, a chip multi-processor with spare processors.

Samy Makar, Tony Altinis, N. Patkar et al. · 2007 · 40 citations

Processor Cores, Engineering, Atpg Patterns +14

SPARC64: a 64-b 64-active-instruction out-of-order-execution MCM processor

Ted E. Williams, N. Patkar, Guanhao Shen · IEEE Journal of Solid-State Circuits · 1995 · 33 citations

Hardware Security, Manycore Processor, Engineering +12

Microarchitecture of HaL's CPU

N. Patkar, A. Katsuno, S. Li et al. · 2002 · 16 citations

Engineering, Pm1 Cpu, Computer Architecture +16

A 64b 4-issue out-of-order execution RISC processor

Guanhao Shen, N. Patkar, Hisao Ando et al. · 2002 · 12 citations

Hardware Security, Sparc V9 64B, Engineering +14

Implementation trade-offs in using a restricted data flow architecture in a high performance RISC microprocessor

M. Simone, D. Tovey, A. Essen et al. · 1995 · 10 citations

Data Flow Architecture, Engineering, Computer Architecture +17