Huy Cu Ngo

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Publications

Citations

256

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Active since

2017

Affiliations

Tokyo Institute of Technology(Current)

Huy Cu Ngo is an author at Tokyo Institute of Technology specializing in engineering, mixed-signal integrated circuit design, and electrical engineering.

ORCID

Publications per year

2017–2022

Publications

A Sub-mW Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> ADPLL With FOM of −246 dB for IoT Applications

Hanli Liu, Dexian Tang, Zheng Sun et al. · IEEE Journal of Solid-State Circuits · 2018 · 72 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +17

A 0.98mW fractional-N ADPLL using 10b isolated constant-slope DTC with FOM of −246dB for IoT applications in 65nm CMOS

Hanli Liu, Dexian Tang, Zheng Sun et al. · 2018 · 56 citations

Engineering, Computer Engineering, Electrical Engineering +15

A Fully Synthesizable Fractional-<i>N</i> MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration

Bangan Liu, Yuncheng Zhang, Junjun Qiu et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2020 · 49 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +17

8.5 A 0.42ps-jitter −241.7dB-FOM synthesizable injection-locked PLL with noise-isolation LDO

Huy Cu Ngo, Kengo Nakata, Toru Yoshioka et al. · 2017 · 27 citations

Engineering, Digital Design, Electrical Engineering +17

A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique

Bangan Liu, Jian Pang, Aravind Tharayil Narayanan et al. · 2018 · 23 citations

Engineering, Electrical Engineering, Low-power Design +14

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