Noureddine Chabini

Reducing dynamic power consumption in synchronous sequential digital designs using retiming and supply voltage scaling

Noureddine Chabini · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2004 · 31 citations

Engineering, Vlsi Design, Energy Efficiency +18

Methods for minimizing dynamic power consumption in synchronous designs with multiple supply voltages

Noureddine Chabini, Ismaïl Chabini, E.M. Aboulhamid et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2003 · 30 citations

Engineering, Energy Efficiency, Power Optimization (Eda) +16

Unification of scheduling, binding, and retiming to reduce power consumption under timings and resources constraints

Noureddine Chabini · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2005 · 23 citations

Cyclic Graphs, Engineering, Energy Efficiency +20

Optimised realisations of large integer multipliers and squarers using embedded blocks

Shuang Gao, Noureddine Chabini, D. Al-Khalili et al. · IET Computers & Digital Techniques · 2007 · 22 citations

Numerical Analysis, Mathematical Programming, Engineering +23

Low power and fast DCT architecture using multiplier-less method

M. El Aakif, Saïd Belkouch, Noureddine Chabini et al. · 2011 · 19 citations

Low-power Electronics, Electrical Engineering, Engineering +13